Comparison of dispatching rules for semiconductor manufacturing using large facility models
Proceedings of the 31st conference on Winter simulation: Simulation---a bridge to the future - Volume 1
Determining optimal lot-size for a semiconductor back-end factory
Proceedings of the 31st conference on Winter simulation: Simulation---a bridge to the future - Volume 1
Proceedings of the 32nd conference on Winter simulation
Simulation Modeling and Analysis
Simulation Modeling and Analysis
Simulation analysis on the impact of furnace batch size increase in a deposition loop
Proceedings of the 38th conference on Winter simulation
Using simulation and hybrid sequencing optimization for makespan reduction at a wet tool
Proceedings of the Winter Simulation Conference
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A typical wafer fab requires numerous decisions for daily operations. Even small decisions on system configurations may have significant impact on the overall fab performance. One of the most critical performance measure is cycle time, where just one day of reduction could represent significant cost savings. In this paper we describe an automated simulation-based optimization method to improve fab configurations. We illustrated our method through a case study that involves optimization of multiple decision variables in a wafer fab. The objective of the optimization is to reduce the cycle time. We show the potentials of such an optimization through achieving an improvement of 15% in cycle time for a furnace toolset.