A rapid modeling technique for measurable improvements in factory performance
Proceedings of the 30th conference on Winter simulation
Criticality of detailed modeling in semiconductor supply chain simulation
Proceedings of the 31st conference on Winter simulation: Simulation---a bridge to the future - Volume 1
Productivity modeling of semiconductor manufacturing equipment
Proceedings of the 32nd conference on Winter simulation
Symbiotic Simulation Control in Semiconductor Manufacturing
ICCS '08 Proceedings of the 8th international conference on Computational Science, Part III
Preventive what-if analysis in symbiotic simulation
Proceedings of the 40th Conference on Winter Simulation
An optimization framework for waferfab performance enhancement
Proceedings of the 40th Conference on Winter Simulation
Using simulation and hybrid sequencing optimization for makespan reduction at a wet tool
Proceedings of the Winter Simulation Conference
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In the dynamic environment of semiconductor manufacturing operations, a bottleneck could be created at the bake furnaces of the deposition loop as capacity expands. Upgrading of the bake furnaces by adding a lot-per-batch in the boat or purchasing a new furnace are two possible solutions to this problem. A simulation model was constructed to assist the decision making, with the behavior of the wet benches (upstream tools) and cluster tools (downstream tools) being modeled in detail. We concluded that a limited number of furnaces upgrade is sufficient to sustain the capacity expansion. But the bottleneck was shifted to an upstream tool, which required the backup tool to be activated to manage the queue. A loading policy that constrains batches to queue at maximum time before loading into the furnaces has to be implemented to balance the efficiency at the furnaces and their downstream tools, without compromising on the cycle time.