Stereo Correspondence with Compact Windows via Minimum Ratio Cycle
IEEE Transactions on Pattern Analysis and Machine Intelligence
Calculating Dense Disparity Maps from Color Stereo Images, an Efficient Implementation
SMBV '01 Proceedings of the IEEE Workshop on Stereo and Multi-Baseline Vision (SMBV'01)
Advances in Computational Stereo
IEEE Transactions on Pattern Analysis and Machine Intelligence
Tyzx DeepSea High Speed Stereo Vision System
CVPRW '04 Proceedings of the 2004 Conference on Computer Vision and Pattern Recognition Workshop (CVPRW'04) Volume 3 - Volume 03
A PC-based real-time stereo vision system
Machine Graphics & Vision International Journal
Reconfigurable hardware implementation of a phase-correlation stereoalgorithm
Machine Vision and Applications
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Low-Cost Stereo Vision on an FPGA
FCCM '07 Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
VoC: a reconfigurable matrix for stereo vision processing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Video-rate stereo depth measurement on programmable hardware
CVPR'03 Proceedings of the 2003 IEEE computer society conference on Computer vision and pattern recognition
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Solving the stereo correspondence problem is an important step towards extraction of three dimensional structure of a scene from two or more images taken from distinct viewpoints. This paper presents a hardware solution to real time stereo matching problem using system of associative relations (SOAR) computational model. SOAR makes use of direction of derivatives for capturing pair-wise pixel interactions and uses pair-wise interactions to determine the underlying structure of associations. Pair-wise pixel interactions are defined over structures called Tokens. The hardware stereo matching solution developed in this study utilizes direction of derivatives to encode inter-pixel associations and implements a real time stereo matching solution. RASCor is realized on an FPGA platform and offers real time stereo matching using hardware parallelism and process pipelining. Real time stereo matching is achieved through hardware unit multiplicity and frequency scaling. The cost of hardware implementation is presented along with performance improvements from frequency scaling, unit multiplicity and search depth for stereo matching.