Computation of component image velocity from local phase information
International Journal of Computer Vision
Phase-based disparity measurement
CVGIP: Image Understanding
The Design and Use of Steerable Filters
IEEE Transactions on Pattern Analysis and Machine Intelligence
Field-programmable gate arrays
Field-programmable gate arrays
Depth Discontinuities by Pixel-to-Pixel Stereo
International Journal of Computer Vision
Rectified Catadioptric Stereo Sensors
IEEE Transactions on Pattern Analysis and Machine Intelligence
Introductory Techniques for 3-D Computer Vision
Introductory Techniques for 3-D Computer Vision
Trinocular Stereo: A Real-Time Algorithm and its Evaluation
International Journal of Computer Vision
Calculating Dense Disparity Maps from Color Stereo Images, an Efficient Implementation
International Journal of Computer Vision
Fast Stereo Matching Using Rectangular Subregioning and 3D Maximum-Surface Techniques
International Journal of Computer Vision
Real-Time Correlation-Based Stereo Vision with Reduced Border Errors
International Journal of Computer Vision
A Hierarchical Symmetric Stereo Algorithm Using Dynamic Programming
International Journal of Computer Vision
Stability of Phase Information
IEEE Transactions on Pattern Analysis and Machine Intelligence
Stereo Correspondence with Compact Windows via Minimum Ratio Cycle
IEEE Transactions on Pattern Analysis and Machine Intelligence
Non-parametric Local Transforms for Computing Visual Correspondence
ECCV '94 Proceedings of the Third European Conference-Volume II on Computer Vision - Volume II
ECCV '02 Proceedings of the 7th European Conference on Computer Vision-Part I
Motion Feature Detection Using Steerable Flow Fields
CVPR '98 Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition
Real-time stereo vision on the PARTS reconfigurable computer
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Précis: A Design-Time Precision Analysis Tool
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Depth from edge and intensity based stereo
IJCAI'81 Proceedings of the 7th international joint conference on Artificial intelligence - Volume 2
Robust online appearance models for visual tracking
IEEE Transactions on Pattern Analysis and Machine Intelligence
A PC-based real-time stereo vision system
Machine Graphics & Vision International Journal
A versatile stereo implementation on commodity graphics hardware
Real-Time Imaging
Graphical Models - Special issue on the vision, video and graphics conference 2005
Face recognition with local steerable phase feature
Pattern Recognition Letters
Face recognition with local steerable phase feature
Pattern Recognition Letters
Immersive Video Teleconferencing with User-Steerable Views
Presence: Teleoperators and Virtual Environments
An Efficient Earth Mover's Distance Algorithm for Robust Histogram Comparison
IEEE Transactions on Pattern Analysis and Machine Intelligence
Reconfigurable on-board vision processing for small autonomous vehicles
EURASIP Journal on Embedded Systems
Design and evaluation of a hardware/software FPGA-based system for fast image processing
Microprocessors & Microsystems
RASCor: An associative hardware algorithm for real time stereo
Computers and Electrical Engineering
A hardware architecture for real-time video segmentation utilizing memory reduction techniques
IEEE Transactions on Circuits and Systems for Video Technology
Architecture and implementation of real-time stereo vision with bilateral background subtraction
ICIC'07 Proceedings of the intelligent computing 3rd international conference on Advanced intelligent computing theories and applications
Exploiting local logic structures to optimize multi-core SoC floorplanning
Proceedings of the Conference on Design, Automation and Test in Europe
VoC: a reconfigurable matrix for stereo vision processing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Enhancing the area efficiency of FPGAs with hard circuits using shadow clusters
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Robotic mapping and localization with real-time dense stereo on reconfigurable hardware
International Journal of Reconfigurable Computing - Special issue on selected papers from ReconFig 2009 International conference on reconfigurable computing and FPGAs (ReconFig 2009)
Design and hardware implementation of a stereo-matching system based on dynamic programming
Microprocessors & Microsystems
Supervised design space exploration by compositional approximation of Pareto sets
Proceedings of the 48th Design Automation Conference
A real-time fuzzy hardware structure for disparity map computation
Journal of Real-Time Image Processing
Face recognition based on local steerable feature and random subspace LDA
AMFG'05 Proceedings of the Second international conference on Analysis and Modelling of Faces and Gestures
A real-time large disparity range stereo-system using FPGAs
ACCV'06 Proceedings of the 7th Asian conference on Computer Vision - Volume Part II
A novel stereo matching method for wide disparity range detection
ICIAR'05 Proceedings of the Second international conference on Image Analysis and Recognition
A generative model of dense optical flow in layers
SCVMA'04 Proceedings of the First international conference on Spatial Coherence for Visual Motion Analysis
Low-cost FPGA stereo vision system for real time disparity maps calculation
Microprocessors & Microsystems
Real-time disparity map computation using the cell broadband engine
Journal of Real-Time Image Processing
A multi-resolution approach for massively-parallel hardware-friendly optical flow estimation
Journal of Visual Communication and Image Representation
Efficient and high performance FPGA-based rectification architecture for stereo vision
Microprocessors & Microsystems
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This paper describes the implementation of a stereo depth measurement algorithm in hardware on Field-Programmable Gate Arrays (FPGAs). This system generates 8-bit sub-pixel disparities on 256 by 360 pixel images at video rate (30 frames/sec). The algorithm implemented is a multi-resolution, multi-orientation phasebased technique called Local Weighted Phase-Correlation [12]. Hardware implementation speeds up the performance more than 300 times that of the same algorithm running in software. In this paper, we describe the programmable hardware platform, the base stereo vision algorithm and the design of the hardware. We include various trade-offs required to make the hardware small enough to fit on our system and fast enough to work at video rate. We also show sample outputs from the functioning hardware. Although this paper is specifically focused on phase-based stereo vision FPGA realizations, most of the design issues are common to other DSP and Vision applications.