Data caching, garbage collection, and the Java memory model
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems
Implementing time-predictable load and store operations
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Towards a Statistical Model of a Microprocessor's Throughput by Analyzing Pipeline Stalls
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Towards Time-Predictable Data Caches for Chip-Multiprocessors
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Worst-case execution time analysis for a Java processor
Software—Practice & Experience
WCET driven design space exploration of an object cache
Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems
Worst-case execution time analysis-driven object cache design
Concurrency and Computation: Practice & Experience
On the scalability of time-predictable chip-multiprocessing
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
Data cache organization for accurate timing analysis
Real-Time Systems
| Hi-index | 0.00 |
Caches are a mandatory feature of current processors to deliver instructions and data to a fast processor pipeline. However, standard cache organizations are designed to increase the average case performance. They are hard to model for worst-case execution time (WCET) analysis. Unknown abstract cache states during the analysis result in conservative WCET bounds. Therefore, we propose to adapt the cache organization to simplify the analysis. The data cache is split into several independent caches for the stack, static data, constants, and heap allocated data.