Improving functional density using run-time circuit reconfiguration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Run-Time Adaptive Flexible Instruction Processors
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
A reconfigurable, power-efficient adaptive Viterbi decoder
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Communications Magazine
The software radio architecture
IEEE Communications Magazine
Exploration of hardware sharing for image encoders
Proceedings of the Conference on Design, Automation and Test in Europe
Parametric optimization of reconfigurable designs using machine learning
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
| Hi-index | 0.00 |
Run-time reconfigurable FPGAs are powerful platforms for realising software-defined radio systems. This paper introduces a parametric approach to designing such systems based on application and device parameters. We analyse the potential for reconfiguration in several software-defined radio components and demonstrate how the degree of parallelism in a reconfigurable module influences reconfiguration time and performance. In a case study with a reconfigurable FIR filter, our method increases the performance by a factor of 2.4.