Fault Injection for Dependability Validation: A Methodology and Some Applications
IEEE Transactions on Software Engineering
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
Journal of Electronic Testing: Theory and Applications
Fault Injection Techniques and Tools
Computer
Implementation Approaches for Reconfigurable Logic Applications
FPL '95 Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications
Comparison of Physical and Software-Implemented Fault Injection Techniques
IEEE Transactions on Computers
Basic Concepts and Taxonomy of Dependable and Secure Computing
IEEE Transactions on Dependable and Secure Computing
Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes
IEEE Transactions on Dependable and Secure Computing
Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems
DSN '06 Proceedings of the International Conference on Dependable Systems and Networks
Sequential circuit fault simulation using logic emulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fault emulation: A new methodology for fault grading
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Advances in semiconductor technologies are greatly increasing the likelihood of fault occurrence in deep-submicrometer manufactured VLSI systems. The dependability assessment of VLSI critical systems is a hot topic that requires further research. Field-programmable gate arrays (FPGAs) have been recently proposed as a means for speeding-up the fault injection process in VLSI systems models (fault emulation) and for reducing the cost of fixing any error due to their applicability in the first steps of the development cycle. However, only a reduced set of fault models, mainly stuck-at and bit-flip, have been considered in fault emulation approaches. This paper describes the procedures to inject a wide set of faults representative of deep-submicrometer technology, like stuck-at, bit-flip, pulse, indetermination, stuck-open, delay, short, open-line, and bridging, using the best suitable FPGA-based technique. This paper also sets some basic guidelines for comparing VLSI systems in terms of their availability and safety, which is mandatory in mission and safety critical application contexts. This represents a step forward in the dependability benchmarking of VLSI systems and towards the definition of a framework for their evaluation and comparison in terms of performance, power consumption, and dependability.