ACM Computing Surveys (CSUR)
An analysis of inline substitution for a structured programming language
Communications of the ACM
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
The use of static column ram as a memory hierarchy
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Design Considerations for Single-Chip Computers of the Future
IEEE Transactions on Computers
IEEE Transactions on Computers
IBM Journal of Research and Development
| Hi-index | 14.99 |
Garcia-Molina, Lipton, and Valdes [1] introduced a new machine architecture called "massive memory machines" (MMM). The primary application of their proposed architecture was for so-called memory bound computations. In this correspondence we argue: 1) that massive memories will likely become feasible, but will be most effective with much more powerful processors, and 2) that a massive memory on the proposed machine will perform poorly in the same cases that virtual memory performs poorly: whenever there is poor locality of memory reference. Other problems with the architecture are also discussed. These related issues include: 1) the infeasibility of large on-chip dual port memory, 2) the support of multiprocessing on an ESP, 3) the possibility of memory prerequest, 4) the potential of trading program size for execution time, and 5) the time required for clearing the entire memory.