Low power design challenges for the decade (invited talk)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Simulation and optimization of the power distribution network in VLSI circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Deterministic Clock Gating for Microprocessor Power Reduction
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Full chip leakage estimation considering power supply and temperature variations
Proceedings of the 2003 international symposium on Low power electronics and design
Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Efficient early stage resonance estimation techniques for C4 package
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Localized On-Chip Power Delivery Network Optimization via Sequence of Linear Programming
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Finding the worst voltage violation in multi-domain clock gated power network
Proceedings of the conference on Design, automation and test in Europe
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This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering leakage current. We first describe the 3D Power Distribution Network (PDN) structure which includes on-chip inductance and through-silicon-vias (TSV). The analysis flow using a superposition technique will be introduced later on. Then, we propose a general model to identify the worst-case gating pattern and the maximum variation area with arbitrary leakage current. For low power wireless chips, we introduce another simplified model, which treats the leakage to be a DC current. We formulate these two models with integer linear programming (ILP). The ILP based method is significantly faster than a conventional method based on enumeration. The experimental results also show that the noise contributed by leakage current is not negligible.