Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
RuleBase: an industry-oriented formal verification tool
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Verifying linear temporal properties of data insensitive controllers using finite instantiations
CHDL'97 Proceedings of the IFIP TC10 WG10.5 international conference on Hardware description languages and their applications : specification, modelling, verification and synthesis of microelectronic systems: specification, modelling, verification and synthesis of microelectronic systems
Model checking
Expressing interesting properties of programs in propositional temporal logic
POPL '86 Proceedings of the 13th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Practical Formal Verification in Microprocessor Design
IEEE Design & Test
Automatic Datapath Abstraction In Hardware Systems
Proceedings of the 7th International Conference on Computer Aided Verification
Model Checking in a Microprocessor Design Project
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Analyzing a PowerPCTM620 Microprocessor Silicon Failure Using Model Checking
Proceedings of the IEEE International Test Conference
Automatic Data Path Abstraction for Verification of Large Scale Designs
ICCD '98 Proceedings of the International Conference on Computer Design
Applying Formal Verification with Protocol Compiler
DSD '01 Proceedings of the Euromicro Symposium on Digital Systems Design
Automatic abstraction and verification of verilog models
Proceedings of the 41st annual Design Automation Conference
Functional formal verification on designs of pSeries microprocessors and communication subsystems
IBM Journal of Research and Development - POWER5 and packaging
Structured Approach to Property Specification and Verification of HW IP
RSP '07 Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping
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Data independence is a useful technique in reasoning about systems. Commonly, if one knows that the qualitative behaviour of a system does not depend on the specific values of data inputs, the proof of facts about its behaviour can be simplified. Such knowledge typically comes from examination of the syntax of the program for the system. Industrial hardware verification flows lead to a requirement for automated proof of data independence without intrusion into the program, where the specification on which the proof is based makes no reference to details of the program language. This paper presents and proves a sufficient condition for data independence, expressed in terms of the behaviour of inputs and outputs of a system, that can be checked in practice by a model checker; and it demonstrates how this condition is used in two design applications.