Introduction to algorithms
Global design of analog cells using statistical optimization techniques
Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
Optimization of custom MOS circuits by transistor sizing
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Enhanced simulated annealing for globally minimizing functions of many-continuous variables
ACM Transactions on Mathematical Software (TOMS)
Ant algorithms for discrete optimization
Artificial Life
Local Search in Combinatorial Optimization
Local Search in Combinatorial Optimization
A Taxonomy of Hybrid Metaheuristics
Journal of Heuristics
The sizing rules method for analog integrated circuit design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Scatter Search: Methodology and Implementations in C
Scatter Search: Methodology and Implementations in C
PAD: A New Interactive Knowledge-Based Analog Design Approach
Analog Integrated Circuits and Signal Processing
Geometric programming for circuit optimization
Proceedings of the 2005 international symposium on Physical design
A high performances CMOS CCII and high frequency applications
Analog Integrated Circuits and Signal Processing
Optimizing performances of switched current memory cells through a heuristic
Analog Integrated Circuits and Signal Processing
Multi-objective genetic algorithms: Problem difficulties and construction of test problems
Evolutionary Computation
Metaheuristics: Progress in Complex Systems Optimization
Metaheuristics: Progress in Complex Systems Optimization
Introduction to Design of Experiments with JMP Examples, Third Edition
Introduction to Design of Experiments with JMP Examples, Third Edition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We present a novel heuristic for optimizing analog circuit performances. It deals with generating the Pareto front using the topological properties of the feasible solution space. This heuristic allows us generating optimal values of circuit parameters in reduced computation time and memory consumption. Unlike basic metaheuristics, it does not need optimization background from the user in order to be easily adapted to different applications. It can thus be smoothly integrated into an automated design flow. This novel approach enables us to further improve (good) performances that were already reached using other optimizing techniques. Robustness of the algorithm was proved using specific difficult test problems.