The Spring kernel: a new paradigm for real-time operating systems
ACM SIGOPS Operating Systems Review
Proof of a mutual exclusion algorithm—a classic example
ACM SIGOPS Operating Systems Review
Latency Hiding in Message-Passing Architectures
Proceedings of the 8th International Symposium on Parallel Processing
Hardware Support for Priority Inheritance
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
A hardware/software kernel for system on chip designs
Proceedings of the 2004 ACM symposium on Applied computing
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Hardware/software partitioning of operating systems: a behavioral synthesis approach
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Predictable Interrupt Management for Real Time Kernels over conventional PC Hardware
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Predictable Interrupt Scheduling with Low Overhead for Real-Time Kernels
RTCSA '06 Proceedings of the 12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
The design and implementation of AspectC++
Knowledge-Based Systems
Connection handoff policies for TCP offload network interfaces
OSDI '06 Proceedings of the 7th symposium on Operating systems design and implementation
CiAO: an aspect-oriented operating-system family for resource-constrained embedded systems
USENIX'09 Proceedings of the 2009 conference on USENIX Annual technical conference
Integrated Task and Interrupt Management for Real-Time Systems
ACM Transactions on Embedded Computing Systems (TECS)
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
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A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification. We propose a hardware-based approach that makes use of a coprocessor to eliminate the potential priority inversion. By evaluating a prototypical implementation, we show that our approach both overcomes the restrictions of software approaches and introduces only a slight processing overhead in exchange for increased predictability.