Yield-driven iterative robust circuit optimization algorithm

  • Authors:
  • Yan Li;Vladimir Stojanović

  • Affiliations:
  • Massachusetts Institute of Technology, Cambridge, MA;Massachusetts Institute of Technology, Cambridge, MA

  • Venue:
  • Proceedings of the 46th Annual Design Automation Conference
  • Year:
  • 2009

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Abstract

This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance monotonicity in random variations constraint maximization can be used to efficiently find critical constraints and worst-case scenarios of random process variations and populate them into a multi-scenario optimization. This algorithm scales gracefully with circuit size and is tested on both two-stage and fully differential folded-cascode operational amplifiers with a 90 nm predictive model. The improving yield-trends are confirmed across process and random variations with Hspice Monte-Carlo simulations.