Factoring and eliminating common subexpressions in polynomial expressions
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
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WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Optimization of polynomial datapaths using finite ring algebra
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Approximate factorization of multivariate polynomials using singular value decomposition
Journal of Symbolic Computation
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Improved heuristics for finite word-length polynomial datapath optimization
Proceedings of the 2009 International Conference on Computer-Aided Design
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Modular datapath optimization and verification based on modular-HED
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits
Proceedings of the International Conference on Computer-Aided Design
Polynomial datapath optimization using constraint solving and formal modelling
Proceedings of the International Conference on Computer-Aided Design
Microprocessors & Microsystems
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Datapath designs that perform polynomial computations over Z2n are used in many applications such as computer graphics and digital signal processing domains. As the market of such applications continues to grow, improvements in high-level synthesis and optimization techniques for multivariate polynomials have become really challenging. This paper presents an efficient algorithm for optimizing the implementation of a multivariate polynomial over Z2n in terms of the number of multipliers and adders. This approach makes use of promising heuristics to extract more complex common sub-expressions from the polynomial compared to the conventional methods. The proposed algorithm also utilizes a canonical decision diagram, Horner-Expansion Diagram (HED) [1] to reduce the polynomial's degree over Z2n. Experimental results have shown an average saving of 27% and 10% in terms of the number of logic gates and critical path delay respectively compared to existing high-level synthesis tools as well as state of the art algebraic approaches.