Switch Complexity in Systems with Hybrid Redundancy
IEEE Transactions on Computers
An Iterative Cell Switch Design for Hybrid Redundancy
IEEE Transactions on Computers
Reliability Modeling of Compensating Module Failures in Majority Voted Redundancy
IEEE Transactions on Computers
Fault-Tolerance of the Iterative Cell Array Switch for Hybrid Redundancy
IEEE Transactions on Computers
An Algorithm for the Accurate Reliability Evaluation of Triple Modular Redundancy Networks
IEEE Transactions on Computers
An Organization for a Highly Survivable Memory
IEEE Transactions on Computers
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
Acceptable Testing of VLSI Components Which Contain Error Correctors
IEEE Transactions on Computers
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Various switch designs for the hybrid redundancy scheme are studied. A reliability model for the switch is developed and the switch is shown to be a significant factor in the overall system reliability. A hybrid redundancy scheme with a triple-modular redundant (TMR) core may have a maximum attainable reliability for only a spare or two. Adding spares complicates the switch enough to cause the system reliability to actually decrease. There exist conditions under which the switch becomes so complex that simple TMR would yield a better solution. Models for fault-tolerant switch designs are also obtained. Finally, various designs are compared via their reliability models.