A verifiable secret shuffle and its application to e-voting
CCS '01 Proceedings of the 8th ACM conference on Computer and Communications Security
Government: a better ballot box?
IEEE Spectrum - The amazing vanishing transistor act
The Quest for Efficient Boolean Satisfiability Solvers
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Electronic vote tabulation checks and balances
Electronic vote tabulation checks and balances
Communications of the ACM - Voting systems
Prerendered user interfaces for higher-assurance electronic voting
EVT'06 Proceedings of the USENIX/Accurate Electronic Voting Technology Workshop 2006 on Electronic Voting Technology Workshop
Designing voting machines for verification
USENIX-SS'06 Proceedings of the 15th conference on USENIX Security Symposium - Volume 15
Extending prerendered-interface voting software to support accessibility and other ballot features
EVT'07 Proceedings of the USENIX Workshop on Accurate Electronic Voting Technology
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Civitas: Toward a Secure Voting System
SP '08 Proceedings of the 2008 IEEE Symposium on Security and Privacy
Building reliable voting machine software
Building reliable voting machine software
Verifiable functional purity in java
Proceedings of the 15th ACM conference on Computer and communications security
Helios: web-based open-audit voting
SS'08 Proceedings of the 17th conference on Security symposium
VoteBox: a tamper-evident, verifiable electronic voting system
SS'08 Proceedings of the 17th conference on Security symposium
EVT'08 Proceedings of the conference on Electronic voting technology
VoteBox nano: a smaller, stronger FPGA-based voting machine
EVT/WOTE'09 Proceedings of the 2009 conference on Electronic voting technology/workshop on trustworthy elections
Prêt à voter with re-encryption mixes
ESORICS'06 Proceedings of the 11th European conference on Research in Computer Security
Procedural security analysis: A methodological approach
Journal of Systems and Software
Formal analysis of an electronic voting system: An experience report
Journal of Systems and Software
A unified design method utilizing decomposability and composability for secure systems
Proceedings of the 2011 ACM Symposium on Research in Applied Computation
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We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was designed specifically to enable verification and testing. In our architecture, the voting machine is a finite-state transducer that implements the bare essentials required for an election. We formally specify how each component of the machine is intended to work and formally verify that a Verilog implementation of our design meets this specification. However, it is more challenging to verify that the composition of these components will behave as a voter would expect, because formalizing human expectations is difficult. We show how systematic testing can be used to address this issue, and in particular to verify that the machine will behave correctly on election day.