A cost-driven lithographic correction methodology based on off-the-shelf sizing tools
Proceedings of the 40th annual Design Automation Conference
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Statistical static timing analysis: how simple can we get?
Proceedings of the 42nd annual Design Automation Conference
A path-based methodology for post-silicon timing validation
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Statistical critical path analysis considering correlations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Statistical timing analysis with path reconvergence and spatial correlations
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Process variability considerations in the design of an eSRAM
MTDT '07 Proceedings of the 2007 IEEE International Workshop on Memory Technology, Design and Testing
Statistical characterization of library timing performance
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Hi-index | 0.00 |
With technology scaling, power dissipation and localized heating in global and semi-global bus wires are becoming increasingly important. One way to mitigate these effects is to ensure uniform switching of bus wires. This prevents the unusual heating ...