A reconfigurable FEC system based on Reed-Solomon codec for DVB and 802.16 network

Authors:
Lamia Chaari;Mohamed Fourati;Nouri Masmoudi;Lotfi Kamoun
Affiliations:
Electronic and Information Technologies Laboratory, Sfax National Engineering School, Sfax, Tunisie;Electronic and Information Technologies Laboratory, Sfax National Engineering School, Sfax, Tunisie;Electronic and Information Technologies Laboratory, Sfax National Engineering School, Sfax, Tunisie;Electronic and Information Technologies Laboratory, Sfax National Engineering School, Sfax, Tunisie
Venue:
WSEAS Transactions on Circuits and Systems
Year:
2009

Citing 11
Cited 0

Digital communications: fundamentals and applications

Digital communications: fundamentals and applications
Error-control coding for computer systems

Error-control coding for computer systems
Error control systems for digital communication and storage

Error control systems for digital communication and storage
High-speed architectures for Reed-Solomon decoders

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Software Defined Radio: Baseband Technology for 3G Handsets and Basestations

Software Defined Radio: Baseband Technology for 3G Handsets and Basestations
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders

Journal of VLSI Signal Processing Systems
Proactive Reed-Solomon Bypasss (PRSB): A Technique for Real-Time Multimedia Processing in 3G Cellular Broadcast Networks

RTCSA '05 Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
The Berlekamp-Massey Algorithm revisited

Applicable Algebra in Engineering, Communication and Computing
Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving

IEICE - Transactions on Information and Systems
Design and implementation of digital linear control systems on reconfigurable hardware

EURASIP Journal on Applied Signal Processing
Design of application-specific instructions and hardware accelerator for reed-solomon codecs

EURASIP Journal on Applied Signal Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

This article proposes, a reconfigurable FEC system based on Reed-Solomon codec for DVB and WiMax networks. The proposed architecture implements various programmable primitive polynomials. A lot of VLSI implementations have been described in literature. This paper introduces a highly parametrical RS-coder-decoder on FPGAs. The implementation, written in a hardware description language (HDL), is based on an Berlekamp massey, Chain and Formey Algorithms. We have defined an advanced RS encoder-decoder architecture based on parameterization approach which is a key solution for software defined radio (SDR) systems. Our parameterization approach is used in order to implement on FPGA a generic RS coder-decoder for DVB and WiMax networks. IEEE Std. 802.16 specifies that the codec performs a variable number of check symbols in a codeword ( ranges from 0 to 32, inclusive). The value of check symbols are specified for each burst profile by the MAC layer according to cross layer concept.