Designing hardware with dynamic memory abstraction

  • Authors:
  • Jiri Simsa;Satnam Singh

  • Affiliations:
  • Carnegie Mellon University, Pittsburgh, USA;Microsoft Research UK, Cambridge, United Kingdom

  • Venue:
  • Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
  • Year:
  • 2010

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Abstract

Recent progress in program analysis has produced tools that are able to compute upper bounds on the use of dynamic memory. This opens up a space for the use of dynamic memory abstraction in high-level synthesis. In this paper, we explain how to design hardware using C programs with malloc() and free(). A compilation process is outlined for transforming C programs with heap operations into a hardware description language. As demonstrated by our experiments, this approach is feasible. Further, automatic parallelization of the generated circuits improves by a factor up to 1.9 in terms of clock frequency and a factor up to 2.7 in terms of clock cycles over the previous work.