Hardware-software co-design of embedded reconfigurable architectures
Proceedings of the 37th Annual Design Automation Conference
An automated process for compiling dataflow graphs into reconfigurable hardware
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Mapping a Single Assignment Programming Language to Reconfigurable Systems
The Journal of Supercomputing
Introductory Techniques for 3-D Computer Vision
Introductory Techniques for 3-D Computer Vision
Stream-Oriented FPGA Computing in the Streams-C High Level Language
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Compiling ATR Probing Codes for Execution on FPGA Hardware
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
One-Step Compilation of Image Processing Applications to FPGAs
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
The case for more digital logic in Computer Architecture
ACE '04 Proceedings of the Sixth Australasian Conference on Computing Education - Volume 30
Input data reuse in compiling window operations onto reconfigurable hardware
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
A methodology for generating verified combinatorial circuits
Proceedings of the 4th ACM international conference on Embedded software
Optimized Generation of Data-Path from C Codes for FPGAs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The role of digital logic in the computer science curriculum
Journal of Computing Sciences in Colleges
An FPGA-based digital logic lab for computer organization and architecture
Journal of Computing Sciences in Colleges
Bio Molecular Engine: a bio-inspired environment for models of growing and evolvable computation
GECCO '05 Proceedings of the 7th annual workshop on Genetic and evolutionary computation
Compile-time area estimation for LUT-based FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy- and time-efficient matrix multiplication on FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A code refinement methodology for performance-improved synthesis from C
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Efficient hardware code generation for FPGAs
ACM Transactions on Architecture and Code Optimization (TACO)
Achieving programming model abstractions for reconfigurable computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimus: efficient realization of streaming applications on FPGAs
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
A compiler intermediate representation for reconfigurable fabrics
International Journal of Parallel Programming
Application development with the FlexWAFE real-time stream processing architecture for FPGAs
ACM Transactions on Embedded Computing Systems (TECS)
Building heterogeneous reconfigurable systems with a hardware microkernel
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Designing hardware with dynamic memory abstraction
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Impact of high-level transformations within the ROCCC framework
ACM Transactions on Architecture and Code Optimization (TACO)
Leap scratchpads: automatic memory and cache management for reconfigurable logic
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
High-level language and compiler for reconfigurable computing
CIS'04 Proceedings of the First international conference on Computational and Information Science
CEFP'11 Proceedings of the 4th Summer School conference on Central European Functional Programming School
Dynafuse: dynamic dependence analysis for FPGA pipeline fusion and locality optimizations
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
Journal of Real-Time Image Processing
| Hi-index | 4.10 |
Reconfigurable computing systems typically consist of an array of configurable computing elements. The computational granularity of these elements ranges from simple gates to complete arithmetic logic units, with or without registers. A rich programmable interconnect completes the array.Performance evaluation of Simple-Assignment C, a high-level, algorithmic language for one-step compilation to host code and field-programmable-gate-array configuration codes, has just begun, with the authors porting the system to a more complex board that contains three FPGAs.