Multiplication over Fpm on FPGA: a survey

Authors:
Jean-Luc Beuchat;Takanori Miyoshi;Yoshihito Oyama;Eiji Okamoto
Affiliations:
Laboratory of Cryptography and Information Security, University of Tsukuba, Tsukuba, Ibaraki, Japan;Laboratory of Cryptography and Information Security, University of Tsukuba, Tsukuba, Ibaraki, Japan;Laboratory of Cryptography and Information Security, University of Tsukuba, Tsukuba, Ibaraki, Japan;Laboratory of Cryptography and Information Security, University of Tsukuba, Tsukuba, Ibaraki, Japan
Venue:
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
Year:
2007

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Abstract

This paper aims at comparing multiplication algorithms over Fpm on FPGA. Contrary to previous surveys providing the reader with an estimate of both area and delay in terms of XOR gates, we discuss place-and-route results which point out that the choice of an algorithm depends on the irreducible polynomial and on some architectural parameters. We designed a VHDL code generator to easily study a wide range of algorithms and parameters.