IBM Journal of Research and Development - Spintronics
Spin angular momentum transfer in current-perpendicular nanomagnetic junctions
IBM Journal of Research and Development - Spintronics
TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit
ACM Transactions on Embedded Computing Systems (TECS)
Design of MRAM based logic circuits and its applications
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
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In this article we present a design method for integrating non-volatile MRAM memory cells into standard CMOS design. The emphasis is on standard cell based flow for general purpose logic and automatic generation or MRAM macros suitable for the applications. We present a design space exploration for this purpose and transient simulation results of the hybrid MTJ/CMOS designs. We continue the article with examples of automatic macro generation, integration layout and a prototype in 130nm CMOS which is designed to test a large subset of this design space. In conclusion we show that a high 3D integration density with reasonable speed can be achieved with automatic flow by sharing the reading/writing circuitry among a number of MTJs.