Digital Design: Principles and Practices
Digital Design: Principles and Practices
Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
Principles in the Evolutionary Design of Digital Circuits—Part II
Genetic Programming and Evolvable Machines
Hardware Evolution at Function Level
PPSN IV Proceedings of the 4th International Conference on Parallel Problem Solving from Nature
Proceedings of the European Conference on Genetic Programming
Scalability Problems of Digital Circuit Evolution: Evolvability and Efficient Designs
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Towards the Automatic Design of More Efficient Digital Circuits
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Evolutionary Synthesis of Arithmetic Circuit Structures
Artificial Intelligence Review
Evolutionary Development of Generic Multipliers: Initial Results
AHS '07 Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems
Evolving multiplier circuits by training set and training vector partitioning
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Generalized Disjunction Decomposition for Evolvable Hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
Instruction-based development: From evolution to generic structures of digital circuits
International Journal of Knowledge-based and Intelligent Engineering Systems - Adaptive Hardwarel / Evolvable Hardware
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Combinational multipliers represent a class of circuits that is usually considered to be hard to design by means of the evolutionary techniques. However, experiments conducted under the previous research demonstrated (1) a suitability of an instruction-based developmental model to design generic multiplier structures using a parametric approach, (2) a possibility of the development of irregular structures by introducing an environment which is considered as an external control of the developmental process - inspired by the structures of conventional multipliers and (3) an adaptation of the developing structures to the different environments by utilizing the properties of the building blocks. These experiments have represented the first case when generic multipliers were designed using an evolutionary algorithm combined with the development. The goal of this paper is to present an improved developmental model working with the simplified building blocks based on the concept of conventional generic multipliers, in particular, adders and basic AND gates. We show that this approach allows us to design generic multiplier structures which exhibit better delay in comparison with the classic multipliers, where adder represents a basic component.