High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
A neural network based algorithm for the scheduling problem in high-level synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
SUIF: an infrastructure for research on parallelizing and optimizing compilers
ACM SIGPLAN Notices
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
EURO-DAC '94 Proceedings of the conference on European design automation
Introduction to algorithms
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A Graph Based Algorithm for Data Path Optimization in Custom Processors
DSD '06 Proceedings of the 9th EUROMICRO Conference on Digital System Design
Simultaneous FU and register binding based on network flow method
Proceedings of the conference on Design, automation and test in Europe
Exhaustive Data Path Optimization in High-Level Synthesis through Area Improvement
ICCIT '09 Proceedings of the 2009 Fourth International Conference on Computer Sciences and Convergence Information Technology
| Hi-index | 0.00 |
As CMOS technology scales down into the deep-submicron domain, the cost of design, complexity and customization for Systems-On-Chip (SoCs) is rapidly increasing due to the inefficiency of traditional CAD tools. In this paper we present a new interactive refinement algorithm in high-level synthesis, based on dynamic programming, which maximizes resource optimization in data path. We start by quantifying the properties of the given application C code in terms of control data flow graph (CDFG), available parallelism and other metrics. We then apply designer guided constraints to a data path refinement algorithm for an initial data path. It attempts to reduce the number of the most expensive components while meeting the constraints. The experimental results show that not only the refined data path outperforms data paths refined by other heuristic methods, but also presents lower cost, less overhead and can be generated in less time.