RF microelectronics
Proceedings of the 39th annual Design Automation Conference
A novel high-speed sense-amplifier-based flip-flop
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Principles of Communications
A discrete-time input ΔΣ ADC architecture using a dual-VCO-based integrator
IEEE Transactions on Circuits and Systems II: Express Briefs
A switching-based phase noise model for CMOS ring oscillators based on multiple thresholds crossing
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Low phase-noise VCO utilizing modified symmetric load and partial positive feedback for FDSM
Analog Integrated Circuits and Signal Processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Frequency-to-digital conversion based on a sampled Phase-Locked Loop
Microelectronics Journal
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A voltage-controlled oscillator (VCO) based analog-to-digital converter (ADC) is a time-based architecture with a first-order noise-shaping property, which can be implemented using a VCO and digital circuits. This paper analyzes the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops. Based on this analysis, design criteria for determining parameters for VCO-based ADCs are described. In addition, a digital calibration technique to enhance the spurious-free dynamic range degraded by the nonlinearity is also introduced. To verify the theoretical analysis, a prototype chip is implemented in a 0.13-µm CMOS process. With a 500-MHz sampling frequency, the prototype achieves a signal-to-noise ratio ranging from 71.8 to 21.3 dB for an input bandwidth of 100 kHz-247 MHz, while dissipating 12.6 mW and occupying an area of 0.078 mm2.