Transistor size optimization in the tailor layout system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Performance-driven placement of cell based IC's
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Efficient algorithms for computing the longest viable path in a combinational network
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
CMOS VLSI layout synthesis for circuit performance
CMOS VLSI layout synthesis for circuit performance
Chip layout optimization using critical path weighting
DAC '84 Proceedings of the 21st Design Automation Conference
Metal--Metal Matrix (M 3) for High-Speed MOS VLSI Layout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
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