Tutorial 2: Leakage Issues in IC Design: Trends, Estimation, and Avoidance
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Benefits and Costs of Power-Gating Technique
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes
VLSID '07 Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems
Low-power H.264/AVC baseline decoder for portable applications
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels
VLSID '09 Proceedings of the 2009 22nd International Conference on VLSI Design
Unequal Error Protection Based on DVFS for JSCD in Low-Power Portable Multimedia Systems
ACM Transactions on Embedded Computing Systems (TECS)
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This paper presents a low-power baseband-video joint decoder design using a novel unequal error protection (UEP) scheme for wireless telecommunications. This method is developed for H.264 layered (data partitioned) video transmission over low density parity check (LDPC) codec. We exploit the fact that not all transmitted data require the same level of error protection; this is known as unequal error protection. In particular, we use a variable iteration LDPC decoding scheme along with H.264 data partitioning (DP). In this scheme, we determine and use variable iterations that are needed by the LDPC baseband decoder to achieve pre-specified image qualities at the receiver and apply power gating to minimize energy consumption.