Microelectronic circuits and devices (2nd ed.)
Microelectronic circuits and devices (2nd ed.)
Impact of MOSFET parameters on its parasitic capacitances
EHAC'07 Proceedings of the 6th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Impact of MOSFET's performance on its threshold voltage and its influence on design of MOS inverters
WSEAS Transactions on Systems and Control
The impact of MOSFET's physical parameters on its threshold voltage
MINO'07 Proceedings of the 6th conference on Microelectronics, nanoelectronics, optoelectronics
Microelectronic Circuits Revised Edition
Microelectronic Circuits Revised Edition
CMOS Digital Integrated Circuits Analysis & Design
CMOS Digital Integrated Circuits Analysis & Design
Digital Integrated Circuits: Analysis and Design, Second Edition
Digital Integrated Circuits: Analysis and Design, Second Edition
Hi-index | 0.00 |
During the design phase of different logic gates based on MOS technologies, it is necessary to take into consideration many parameters which characterise MOS transistors. One of the parameters which characterizes all types of MOSFET transistors is the threshold voltage that has impact in static and dynamic performances of the different logic gates. The aim of this paper is to research the impact threshold voltage of NMOS (driver) and PMOS (active load) transistors during the design phase of pseudo-NMOS inverters and in pseudo-NMOS logic gates which perform specific logic functions. The results obtained emphasize the impact of each single value of the threshold voltage at the low level of the output voltage, at the level values of static current at output and on the shape of the voltage transfer characteristic in the pseudo-NMOS inverter and pseudo-NMOS logic gates. By adjusting the threshold voltage values of NMOS and PMOS transistor it's possible to design pseudo-NMOS logic gate which will have acceptable performance depending on designers' requests.