Design and optimization of low voltage high performance dual threshold CMOS circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
Drowsy caches: simple techniques for reducing leakage power
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Design Challenges of Technology Scaling
IEEE Micro
Understanding and minimizing ground bounce during mode transition of power gating structures
Proceedings of the 2003 international symposium on Low power electronics and design
Low Power Methodology Manual: For System-on-Chip Design
Low Power Methodology Manual: For System-on-Chip Design
Efficient multiple-bit retention register assignment for power gated design: concept and algorithms
Proceedings of the International Conference on Computer-Aided Design
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Power gating is an effective technique for reducing leakage power which involves powering off idle circuits through power switches, but those power-gated circuits which need to retain their states store their data in state retention registers. When power-gated circuits are switched from sleep to active mode, sudden rush of current has the potential of corrupting the stored data in the state retention registers which could be a reliability problem. This paper presents a methodology for improving the reliability of power-gated designs by protecting the integrity of state retention registers through state monitoring and correction. This is achieved by scan chain data encoding and decoding. The methodology is compatible with EDA tools design and power gating control flows. A detailed analysis of the proposed methodology's capability in detecting and correcting errors is given including the area overhead and energy consumption of the protection circuitry. The methodology is validate using FPGA and show that it is possible to correct all single errors with Hamming code and detect all multiple errors with CRC-16 code. To the best of our knowledge this is the first study in the area of reliable power gating designs through state monitoring and correction.