ACM Transactions on Computer Systems (TOCS)
The Verilog Hardware Description Language, 5th Edition
The Verilog Hardware Description Language, 5th Edition
Mapping a domain specific language to a platform FPGA
Proceedings of the 41st annual Design Automation Conference
CUSP: a modular framework for high speed network applications on FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
Proceedings of the ACM SIGCOMM 2010 conference
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
400 Gb/s Programmable Packet Parsing on a Single FPGA
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Compiling high throughput network processors
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
NetBump: user-extensible active queue management with bumps on the wire
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
Malacoda: towards high-level compilation of network security applications on reconfigurable hardware
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
A template system for the efficient compilation of domain abstractions onto reconfigurable computers
Journal of Systems Architecture: the EUROMICRO Journal
No silver bullet: extending SDN to the data plane
Proceedings of the Twelfth ACM Workshop on Hot Topics in Networks
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Reconfigurable network hardware makes it easier to experiment with and prototype high-speed networking systems. However, these devices are still relatively hard to program; for example, requiring users to develop in Verilog or VHDL. Further, these devices are commonly designed to work with software on a host computer, requiring the co-development of these hardware and software components. We address this situation with Chimpp, a development environment for reconfigurable network hardware, modeled on the popular Click modular router system. Chimpp employs a modular approach to designing hardware-based packet-processing systems, featuring a simple configuration language similar to that of Click. We demonstrate this development environment by targeting the NetF-PGA platform. Chimpp can be combined with Click itself at the software layer for a highly modular, mixed hardware and software design framework. We also enable the integrated simulation of the hardware and software components of a network device together with other network devices using the OMNeT++ network simulator. The goal of Chimpp is to make experimentation easy by providing a toolbox of reusable, modular elements and a way to easily combine them. In contrast with some prior work, Chimpp avoids unnecessary restrictions on module interfaces and design styles. Rather, it is easy to add custom interfaces and to incorporate existing hardware modules. We describe our design and implementation of Chimpp, and provide initial evaluations showing how Chimpp makes it easier to implement, simulate, and modify a variety of packet-processing systems on the NetFPGA platform.