Mapping a domain specific language to a platform FPGA

  • Authors:
  • Chidamber Kulkarni;Gordon Brebner;Graham Schelle

  • Affiliations:
  • Xilinx Inc, San Jose, Ca;Xilinx Inc, San Jose, Ca;University of Colorado, Boulder, Co

  • Venue:
  • Proceedings of the 41st annual Design Automation Conference
  • Year:
  • 2004

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Abstract

A domain specific language (DSL) enables designers to rapidly specify and implement systems for a particular domain, yielding designs that are easy to understand, reason about, re-use and maintain. However, there is usually a significant overhead in the required infrastructure to map such a DSL on to a programmable logic device. In this paper, we present a mapping of an existing DSL for the networking domain on to a platform FPGA by embedding the DSL into an existing language infrastructure. In particular, we will show that, using few basic concepts, we are able to achieve a successful mapping of the DSL on to a platform FPGA and create a re-usable structure that also makes it easy to extend the DSL. Finally we will present some results of mapping the DSL on to a platform FPGA and comment on the resulting overhead.