IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Reducing Test Application Time for Built-in-Self-Test Test Pattern Generators
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Analysis and Design of Optimal Combinational Compactors
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
Diagnosis of Multiple Hold-Time and Setup-Time Faults in Scan Chains
IEEE Transactions on Computers
Broadcasting test patterns to multiple circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Diagnosis of Multiple Scan Chain Timing Faults
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An ATE assisted DFD technique for volume diagnosis of scan chains
Proceedings of the 50th Annual Design Automation Conference
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To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the errors in responses due to defects which are captured in scan cells are not directly observed. We propose a simple and effective way to enhance the diagnostic resolution achievable by production tests with minimal increase in pattern counts. In this work we present experimental results for the case of multiple scan chain faults to demonstrate the effectiveness of the proposed method.