The existence of refinement mappings
Theoretical Computer Science
Proof-checking a data link protocol
TYPES '93 Proceedings of the international workshop on Types for proofs and programs
Integrating formal verification methods with a conventional project design flow
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Formalization and Analysis of a Solution to the PCI 2.1 Bus Transaction Ordering Problem
Formal Methods in System Design - Special issue on formal methods for computer-added design
Formal Design of Cache Memory Protocols in IBM
Formal Methods in System Design
Verifying timing properties of concurrent algorithms
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
TYPES '94 Selected papers from the International Workshop on Types for Proofs and Programs
TYPES '00 Selected papers from the International Workshop on Types for Proofs and Programs
A Compositional Rule for Hardware Design Refinement
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
PCI Express System Architecture
PCI Express System Architecture
Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Design and Verification for PCI Express Controller
ICITA '05 Proceedings of the Third International Conference on Information Technology and Applications (ICITA'05) Volume 2 - Volume 02
XFM: An incremental methodology for developing formal models
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Towards a formal theory of on chip communications in the ACL2 logic
ACL2 '06 Proceedings of the sixth international workshop on the ACL2 theorem prover and its applications
System Level Assertion-Based Verification Environment for PCI/PCI-X and PCI-Express
CIS '07 Proceedings of the 2007 International Conference on Computational Intelligence and Security
Transaction Based Modeling and Verification of Hardware Protocols
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
Pre-RTL formal verification: an intel experience
Proceedings of the 45th annual Design Automation Conference
A refinement approach to design and verification of on-chip communication protocols
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Incremental modelling and verification of the PCI express transaction layer
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Isabelle/HOL: a proof assistant for higher-order logic
Isabelle/HOL: a proof assistant for higher-order logic
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PCI Express is a modern, high-performance communication protocol implementing sophisticated features to meet today's performance demands. Although an off-chip protocol, PCI Express implements many principles of future on-chip communication architectures. It is a highly complex protocol that is hard to verify formally. We present the application of a new approach to the PCI Express transaction and data link layers. The methodology is based on a series of model transformation steps and revises the traditional modeling and verification workflow for designing on-chip protocols. Major parts of PCI Express, including performance-related optimizations and fault-tolerance features, are modeled incrementally to control the complexity and composed to a single model. The work has been accomplished in the Isabelle/HOL theorem prover. By restricting the models to an executable subset of the specification language, we have been able to combine the advantages of specifying in a theorem prover with the advantages of executable models in a functional programming language.