Optimal WCET-aware code selection for scratchpad memory

  • Authors:
  • Hui Wu;Jingling Xue;Sri Parameswaran

  • Affiliations:
  • The University of New South Wales, Sydney, Australia;The University of New South Wales, Sydney, Australia;The University of New South Wales, Sydney, Australia

  • Venue:
  • EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
  • Year:
  • 2010

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Abstract

We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a non-nested loop executed on a fully pipelined processor that uses scratchpad memory to replace the instruction cache. The time complexity of our algorithm is O(m(ne+n2 log n)), where n and e are the number of basic blocks and the number of edges in the control flow graph of the loop, and m is the size of the scratchpad memory. Furthermore, we propose the first dynamic code selection heuristic for minimising the worst-case execution time of a task by using our algorithm for a non-nested loop. Our simulation results show that our heuristic significantly outperforms a previously known heuristic