Shared hardware data structures for hard real-time systems

  • Authors:

  • Gedare Bloom;Gabriel Parmer;Bhagirath Narahari;Rahul Simha

  • Affiliations:

  • George Washington University, Washington, DC, USA;George Washington University, Washington, DC, USA;George Washington University, Washington, DC, USA;George Washington University, Washington, DC, USA

  • Venue:
  • Proceedings of the tenth ACM international conference on Embedded software
  • Year:
  • 2012

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Abstract

Hardware support can reduce the time spent operating on data structures by exploiting circuit-level parallelism. Such hardware data structures (HWDSs) can reduce the latency and jitter of data structure operations, which can benefit real-time systems by reducing worst-case execution times (WCETs). For example, a hardware priority queue (HWPQ) can enqueue and dequeue prioritized items in constant time with low variance; the best software implementations are in logarithmic-time asymptotic complexity for at least one of the enqueue or dequeue operations. The main problems with HWDSs are the limited size of hardware and the complexity of sharing it. In this paper we show that software support can help circumvent the size and sharing limitations of hardware so that applications can benefit from a HWDS. We evaluate our work by showing how the choice of software or hardware affects schedulability of task sets that use multiple priority queues of varying sizes. We model task behavior on two applications that are important in real-time and embedded domains: the grey-weighted distance transform for topology mapping and Dijkstra's algorithm for GPS navigation. Our results indicate that HWDSs can reduce the WCET of applications even when a HWDS is shared by multiple data structures or when data structure sizes exceed HWDS size constraints.