Motivating future interconnects: a differential measurement analysis of PCI latency

Authors:
David J. Miller;Philip M. Watts;Andrew W. Moore
Affiliations:
University of Cambridge, Cambridge, UK;University of Cambridge, Cambridge, UK;University of Cambridge, Cambridge, UK
Venue:
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Year:
2009

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Abstract

Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and packaging mean that further advances will require a new approach to interconnect design. Although latency in networks has been the focus of the High-Performance Computing architect and of concern across the computer community, we illustrate how an evolution in the common PCI interconnect architecture has worsened latency by a factor of between 3 and 25 over earlier incarnations.