Design of a scalable nanophotonic interconnect for future multicores

Orion: a power-performance simulator for interconnection networks

Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture

Cache Array Architecture Optimization at Deep Submicron Technologies

ICCD '04 Proceedings of the IEEE International Conference on Computer Design

Microarchitecture of a High-Radix Router

Proceedings of the 32nd annual international symposium on Computer Architecture

Design tradeoffs for tiled CMP on-chip networks

Proceedings of the 20th annual international conference on Supercomputing

Leveraging Optical Technology in Future Bus-based Chip Multiprocessors

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture

Flattened butterfly: a cost-efficient topology for high-radix networks

Proceedings of the 34th annual international symposium on Computer architecture

A 5-GHz Mesh Interconnect for a Teraflops Processor

IEEE Micro

Corona: System Implications of Emerging Nanophotonic Technology

ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture

iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures

ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture

Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

IEEE Transactions on Computers

Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics

HOTI '08 Proceedings of the 2008 16th IEEE Symposium on High Performance Interconnects

Firefly: illuminating future network-on-chip with nanophotonics

Proceedings of the 36th annual international symposium on Computer architecture