Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
Principles in the Evolutionary Design of Digital Circuits—Part II
Genetic Programming and Evolvable Machines
The Advantages of Landscape Neutrality in Digital Circuit Evolution
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
Proceedings of the European Conference on Genetic Programming
Neutrality and the Evolvability of Boolean Function Landscape
EuroGP '01 Proceedings of the 4th European Conference on Genetic Programming
EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Towards the Automatic Design of More Efficient Digital Circuits
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Finding needles in haystacks is harder with neutrality
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
Reducing the number of transistors in digital circuits using gate-level evolutionary design
Proceedings of the 9th annual conference on Genetic and evolutionary computation
When does Cartesian genetic programming minimize the phenotype size implicitly?
Proceedings of the 12th annual conference on Genetic and evolutionary computation
Redundancy and computational efficiency in Cartesian genetic programming
IEEE Transactions on Evolutionary Computation
Proceedings of the 13th annual conference companion on Genetic and evolutionary computation
Evolving cell array configurations using CGP
EuroGP'11 Proceedings of the 14th European conference on Genetic programming
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In this paper, we propose a new modification of Cartesian Genetic Programming (CGP) that enables to optimize digital circuits more significantly than standard CGP. We argue that considering fully functional but not necessarily smallest-discovered individual as the parent for new population can decrease the number of harmful mutations and so improve the search space exploration. This phenomenon was confirmed on common benchmarks such as combinational multipliers and the LGSynth91 circuits.