Introduction to nMOS & VLSI systems design
Introduction to nMOS & VLSI systems design
Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
Verification Testing A Pseudoexhaustive Test Technique
IEEE Transactions on Computers
Properties of Faults and Criticalities of Values under Tests for Combinational Networks
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
Self-Tested Data Flow Logic: A New Approach
IEEE Design & Test
Mixed hierarchical-functional fault models for targeting sequential cores
Journal of Systems Architecture: the EUROMICRO Journal
Hi-index | 0.00 |
Minimal, pseudo-exhaustive and pseudo-random test patterns are generated for different multiplexers. Fault coverage of these patterns is discussed. Test length requirements (to achieve 100% fault coverage of single stuck-at faults) for different generation techniques are compared.