An algorithm for the generation of test sets for combinational logic networks.
An algorithm for the generation of test sets for combinational logic networks.
Multiple Fault Detection in Combinational Networks
IEEE Transactions on Computers
An Algorithm for the Generation of Test Sets for Combinational Logic Networks
IEEE Transactions on Computers
Fault Equivalence in Combinational Logic Networks
IEEE Transactions on Computers
A Nand Model ror Fault Diagnosis in Combinational Logic Networks
IEEE Transactions on Computers
Derivation of optimum test sequencies for sequential machines
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
Design for Testability A Survey
IEEE Transactions on Computers
An Algorithm for the Generation of Test Sets for Combinational Logic Networks
IEEE Transactions on Computers
On the testing of multiplexers
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
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This correspondence discusses the properties of faults in combinational networks and their relationships with fault-detection and fault-location test sets.