Rapid dynamic programming algorithms for RNA secondary structure
Advances in Applied Mathematics
Hitting the memory wall: implications of the obvious
ACM SIGARCH Computer Architecture News
Algorithms on strings, trees, and sequences: computer science and computational biology
Algorithms on strings, trees, and sequences: computer science and computational biology
Smart Memories: a modular reconfigurable architecture
Proceedings of the 27th annual international symposium on Computer architecture
Workload Characterization of Bioinformatics Applications
MASCOTS '05 Proceedings of the 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
BioBench: A Benchmark Suite of Bioinformatics Applications
ISPASS '05 Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005
Locality and parallelism optimization for dynamic programming algorithm in bioinformatics
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Novel architecture for RNA secondary structure prediction
IDEAL'09 Proceedings of the 10th international conference on Intelligent data engineering and automated learning
Fine-grained parallel RNA secondary structure prediction using SCFGs on FPGA
Parallel Computing
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As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics applications so that some appropriate optimization methods can be applied. Based on the computational behavior of these bioinformatics applications, we propose two optimized algorithms on high performance computer architectures. 1) For the data(I/O) intensive program, MegaBlast, we overlap computation with I/O to produce an improved high-throughput algorithm with reduced time and memory requirements. 2) For a CPU-intensive RNA secondary structure prediction algorithm, we propose a fine-grain parallel O(N3) algorithm based on reconfigurable arrays (FPGAs). In order to optimize the FPGA architecture, we evaluate the performance in different architectures using cycleby-cycle simulator.