Coupling of a reconfigurable architecture and a multithreaded processor core with integrated real-time scheduling

Authors:
Sascha Uhrig;Stefan Maier;Georgi Kuzmanov;Theo Ungere
Affiliations:
University of Augsburg, Institute of Computer Science, Augsburg, Germany;University of Augsburg, Institute of Computer Science, Augsburg, Germany;Delft University of Technology, Computer Engineering Laboratory, Electrical Engineering, Mathematics, and Computer Science Department, Delft, The Netherlands;University of Augsburg, Institute of Computer Science, Augsburg, Germany
Venue:
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Year:
2006

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Abstract

This paper defines a real-time capable interface between the simultaneous multithreaded CarCore processor and a MOLEN-based reconfigurable unit. CarCore is an IP core that enables simultaneous execution of one hard-real-time thread and further non-real-time threads. The coupling described in this paper extends CarCore by a reconfigurable hardware such that both can execute different threads simultaneously, while the realtime behavior of the hard-real-time thread is not harmed. The challenge is the design of a common memory interface for both, the CarCore and the reconfigurable hardware, such that memory operations fulfil hard-real-time constraints. Experimental results with an MJPEG benchmark show an overall application speedup of 2.75 which approaches the theoretically attainable maximum speedup of 2.78.