Interconnects in the third dimension: design challenges for 3D ICs
Proceedings of the 44th annual Design Automation Conference
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
Case Study of a 65-nm SoC Design
IEEE Design & Test
Reducing the leakage and timing variability of 2D ICs using 3D ICs
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Wafer-level 3D integration technology
IBM Journal of Research and Development
Through-silicon vias enable next-generation SiGe power amplifiers forwireless communications
IBM Journal of Research and Development
A study of Through-Silicon-Via impact on the 3D stacked IC layout
Proceedings of the 2009 International Conference on Computer-Aided Design
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Three-dimensional (3D) integration with through-silicon via (TSV) is an emerging technology which has been expected to lead to an industry paradigm shift. Will the industry steam forward with the gusto of 3D IC with TSV? I consider its success in homogeneous integration by looking forward the solution to the following three awareness problems: variability, TSV, and thermal.