A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits

Authors:
Farhad Mehdipour;Hiroaki Honda;Koji Inoue;Hiroshi Kataoka;Kazuaki Murakami
Affiliations:
School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan;Institute of Systems, Information Technologies and Nanotechnologies, Fukuoka, Japan;School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan;School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan;School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University, Fukuoka, Japan and Institute of Systems, Information Technologies and Nanotechnologies, Fuku ...
Venue:
Journal of Systems Architecture: the EUROMICRO Journal
Year:
2011

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Abstract

A large-scale reconfigurable data-path processor (LSRDP) implemented by single-flux quantum (SFQ) circuits is introduced which is integrated to a general purpose processor to accelerate data flow graphs (DFGs) extracted from scientific applications. A number of applications are discovered and analyzed throughout the LSRDP design procedure. Various design steps and particularly the DFG mapping process are discussed and our techniques for optimizing the area of accelerator will be presented as well. Different design alternatives are examined through exploring the LSRDP design space and an appropriate architecture is determined for the accelerator. Primary experiments demonstrate capability of the designed architecture to achieve performance values up to 210 Gflops for attempted applications.