Compilation Approach for Coarse-Grained Reconfigurable Architectures

  • Authors:
  • Jong-eun Lee;Kiyoung Choi;Nikil D. Dutt

  • Affiliations:
  • -;-;-

  • Venue:
  • IEEE Design & Test
  • Year:
  • 2003

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Abstract

Coarse-grained reconfigurable architectures can enhance the performance of critical loops and computation-intensive functions. Such architectures need efficient compilation techniques to map algorithms onto customized architectural configurations. A new compilation approach uses a generic reconfigurable architecture to tackle the memory bottleneck that typically limits the performance of many applications.