Generation of Execution Sequences for Modular Time Critical Systems
IEEE Transactions on Software Engineering
Efficient algorithms for debugging timing constraint violations
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Automated Software Engineering
A Fast and Effective Algorithm for the Feedback Arc Set Problem
Journal of Heuristics
Combining Software and Hardware Verification Techniques
Formal Methods in System Design
Coping with Inconsistent Constraint Specifications
ER '01 Proceedings of the 20th International Conference on Conceptual Modeling: Conceptual Modeling
Proceedings of the tenth international symposium on Hardware/software codesign
Combinatorial algorithms for feedback problems in directed graphs
Information Processing Letters
Breaking cycles for minimizing crossings
Journal of Experimental Algorithmics (JEA)
Balanced vertex-orderings of graphs
Discrete Applied Mathematics
Layered drawings of directed graphs in three dimensions
APVis '05 proceedings of the 2005 Asia-Pacific symposium on Information visualisation - Volume 45
Dominator-based partitioning for delay optimization
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Journal of Experimental Algorithmics (JEA)
IPSep-CoLa: An Incremental Procedure for Separation Constraint Layout of Graphs
IEEE Transactions on Visualization and Computer Graphics
JooJ: real-time support for avoiding cyclic dependencies
ACSC '07 Proceedings of the thirtieth Australasian conference on Computer science - Volume 62
An empirical study of cycles among classes in Java
Empirical Software Engineering
Toward interactive learning by concept ordering
Proceedings of the eighteenth conference on Hypertext and hypermedia
Consensus Genetic Maps as Median Orders from Inconsistent Sources
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
Provably efficient algorithms for resolving temporal and spatial difference constraint violations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Balanced vertex-orderings of graphs
Discrete Applied Mathematics
Voter insertion algorithms for FPGA designs using triple modular redundancy
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Efficient mode enumeration of compositional hybrid systems
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
Aggressive function inlining: preventing loop blockings in the instruction cache
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
An automatic layout algorithm for BPEL processes
Proceedings of the 5th international symposium on Software visualization
Refactoring techniques for aggressive object inlining in Java applications
Automated Software Engineering
Improved GLR parsing algorithm
ICIC'05 Proceedings of the 2005 international conference on Advances in Intelligent Computing - Volume Part II
Shortest paths in almost acyclic graphs
Operations Research Letters
Improved layout for data flow diagrams with port constraints
Diagrams'12 Proceedings of the 7th international conference on Diagrammatic Representation and Inference
oZone: Layer identification in the presence of cyclic dependencies
Science of Computer Programming
Drawing layered graphs with port constraints
Journal of Visual Languages and Computing
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