A built-in test methodology for VLSI data paths

Authors:
C. R. Kime;H. H. Kwan;J. K. Lemke;G. B. Williams
Affiliations:
Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Wisconsin;Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Wisconsin;Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Wisconsin;Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Wisconsin
Venue:
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
Year:
1984

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Abstract

A methodology is proposed for the design of go/no go built-in test for data paths in VLSI circuits. The results of a design study dealing with tradeoffs between testing time, device count overhead, and testability features are presented.