A CMOS current-mode dynamic programming circuit

  • Authors:
  • Terrence Mak;Kai-Pui Lam;H. S. Ng;Guy Rachmuth;Chi-Sang Poon

  • Affiliations:
  • School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, UK;Department of Systems Engineering & Engineering Management, The Chinese University of Hong Kong, Shatin, Hong Kong;Department of Systems Engineering & Engineering Management, The Chinese University of Hong Kong, Shatin, Hong Kong;Harvard-MIT Division of Health Sciences and Technology, Massachusetts Institute of Technology, Cambridge, MA;Harvard-MIT Division of Health Sciences and Technology, Massachusetts Institute of Technology, Cambridge, MA

  • Venue:
  • IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2009 IEEE system-on-chip conference
  • Year:
  • 2010

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Abstract

Dynamic programming (DP) is a fundamental algorithm for complex optimization and decision-making in many engineering and biomedical systems. However, conventional DP computation based on digital implementation of the BeUman-Ford recursive algorithm suffers from the "curse of dimensionality" and substantial iteration delays which hinder utility in real-time applications. Previously, an ordinary differential equation system was proposed that transforms the sequential DP iteration into a continuous-time parallel computational network. Here, the network is realized using a CMOS current-mode analog circuit, which provides a powerful computational platform for power-efficient, compact, and high-speed solution of the Bellman formula. Test results for the fabricated DP optimization chip demonstrate a proof of concept for this solution approach. We also propose an error compensation scheme to minimize the errors attributed to nonideal current sources and device mismatch.