Design techniques and test methodology for low-power TCAMs

Authors:
Nitin Mohan;Wilson Fung;Derek Wright;Manoj Sachdev
Affiliations:
Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada;ATI Technologies Inc., Markham, Canada;Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada;Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2006

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Abstract

Ternary content addressable memories (TCAMs) are gaining importance in high-speed lookup-intensive applications. However, the high cost and power consumption are limiting their popularity and versatility. TCAM testing is also time consuming due to the complex integration of logic and memory. In this paper, we present a comprehensive review of the design techniques for low-power TCAMs. We also propose a novel test methodology for various TCAM components. The proposed test algorithms show significant improvement over the existing algorithms both in test complexity and fault coverage.