Evaluation of FPGA routing architectures under process variation

Authors:
Fatemeh Sadat Pourhashemi;Morteza Saheb Zamani
Affiliations:
Amirkabir University of Technology, Tehran, Iran;Amirkabir University of Technology, Tehran, Iran
Venue:
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Year:
2011

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Abstract

Uncertainty in performance of FPGAs is becoming an important issue due to increased process variations in nanometer regime. Therefore, it is vital to decrease the impact of variability in these devices. FPGA routing architecture enhancement can be an effective way, because as feature size scales down, routing delay dominates logic circuit delay. In this paper, unidirectional and bidirectional routing architectures are compared. We show that bidirectional architecture is better in terms of robustness against variation when short wire segments are considered. However as wire length increases, unidirectional routing architecture would be the preferred option. Experimental results show that in unidirectional routing architecture towards bidirectional for wire length of 8, it has obtained 36% and 20% improvement in standard deviation and 3¼+Ã of circuit delay, respectively.